LIGO Document D2000331-v1

PCIe Timing Interface Daughter Board Template

Document #:
LIGO-D2000331-v1
Document type:
D - Drawings
Other Versions:
Abstract:
A simple daughter board for the PCIe timing interface. It routes 58 of the 64 available LVDS lines to a rear DB37 and a front 80-pin connector.
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