aLIGO AA Chassis Level Test Procedure

Document #:

LIGO-T1100367-v2

Document type:

T - Technical notes

Abstract:

A short test procedure to verify an AA chassis is wired correctly and the boards are functional from a high level perspective. This procedure is for functional testing at the chassis level only assuming all the PCBs inside the chassis have been thoroughly tested per the regular procedure.

Files in Document:

• PDF Version (Adl_AA_AI_chassis_level_TestPlan-v2.pdf, file is not accessible)

Other Files:

• Word Version (Adl_AA_AI_chassis_level_TestPlan-v2.docx, file is not accessible)

Topics:

• Subsystem Test
• System Engineering

Authors:

• Rich Abbott

Keywords:

test procedure aa

Notes and Changes:

Updated a few typos, and Ben added the capability of using this procedure for AI chassis checkout

Related Documents:

• LIGO-D070081: AdL AA and AI Filter Board (65 kHz)

Referenced by:

• LIGO-D0902783-v3: aLIGO AA Chassis Top Assembly Drawing (8xDB9 ISC Version)