IO Interface Backplane (LVDS)

Document #:

LIGO-D2000297-v1

Document type:

D - Drawings

Abstract:

This is a new IO backplane that will interface the PCIe timing board. It uses LVDS lines on a DB37 connector to provide clock signals to individual slots.

Files in Document:

• D2000297-v1.pdf (file is not accessible)

ICS/JIRA Record:

• ICS_LINK

Topics:

• Data Acquisition System

Authors:

• Daniel Sigg
• Marc Pirello