Altium

Design Rule Verification Report

Date: 9/1/2021
Time: 10:43:41 AM
Elapsed Time: 00:00:02
Filename: C:\Dean\A+\D2000552 ADC_Interface_Chassis\D2100639-v1 105kHz ADC Interface\D2100639-v1 105kHz ADC Interface.PcbDoc
Warnings: 0
Rule Violations: 0

Summary

Warnings Count
Total 0

Rule Violations Count
Clearance Constraint (Gap=5mil) (All),(All) 0
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Un-Routed Net Constraint ( (All) ) 0
Modified Polygon (Allow modified: No), (Allow shelved: No) 0
Width Constraint (Min=10mil) (Max=50mil) (Preferred=10mil) (All) 0
Power Plane Connect Rule(Direct Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All) 0
Hole Size Constraint (Min=1mil) (Max=170mil) (All) 0
Hole To Hole Clearance (Gap=10mil) (All),(All) 0
Minimum Solder Mask Sliver (Gap=3mil) (All),(All) 0
Silk To Solder Mask (Clearance=3mil) (IsPad),(All) 0
Silk to Silk (Clearance=3mil) (All),(All) 0
Net Antennae (Tolerance=0mil) (All) 0
Room D2100639-v1 105kHz ADC Interface (Bounding Region = (274.5mil, 170.295mil, 14375.5mil, 11262.953mil) (InComponentClass('D2100639-v1 105kHz ADC Interface')) 0
Room U_QPD Power Status (Bounding Region = (12367.5mil, 884.728mil, 13352.528mil, 1482.937mil) (InComponentClass('U_QPD Power Status')) 0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All) 0
Total 0