customize
Design Rule Verification Report
Date
:
9/4/2009
Time
:
9:19:08 PM
Elapsed Time
:
00:00:01
Filename
:
C:\Users\daniel\Protel\FSS\TTFSSD\TTFSSD.PcbDoc
Warnings
:
0
Rule Violations
:
0
Summary
Warnings
Count
Total
0
Rule Violations
Count
Short-Circuit Constraint (Allowed=No) (All),(All)
0
Un-Routed Net Constraint ( (All) )
0
Clearance Constraint (Gap=10mil) (All),(All)
0
Power Plane Connect Rule(Relief Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All)
0
Width Constraint (Min=10mil) (Max=100mil) (Preferred=10mil) (All)
0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All)
0
Hole Size Constraint (Min=1mil) (Max=100mil) (Disabled)(All)
0
Clearance Constraint (Gap=10mil) ((IsVia)),((IsPad))
0
Total
0